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標題: 請教一下verilog問題Sequence Generator Next with Boolean Expressions [打印本頁]

作者: jerryf 時間: 2019-10-16 04:43
標題: 請教一下verilog問題Sequence Generator Next with Boolean Expressions
Sequence Generator Next with Boolean Expressions

Complete the next_pattern module for the following sequence using Boolean expressions. A manual check will be performed later.

The next_pattern module should be designed by:

Drawing the state graph.
Deriving the next state table.
Using K-maps to simplify the function.

Exercise 2 [5.0]

LOCK

The next_pattern module provides the next state function for a Finite State Machine (FSM) that generates the following sequence of patterns:
7, 0, 14, 11, 13, 6, 2, 5, 1The first pattern follows the last pattern.
Any patterns not in the sequence should be considered as do not cares. The next function will not be tested for these patterns.
Editor

Test BenchSimulation OutputRun

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